The Intel 4004 instruction set is a very limited set of instructions. Most instructions are double-word length (two 8-bit words), with several one-word instructions. Each instruction is divided in to two four bit fields. The upper 4-bits is the OPR field containing the operation code, meanwhile the lower 4-bits is the OPA field containing the modifier. In the case of double-word instructions, the second word contains address information or data.
| OpCode
|
Mnemonic
|
OPR
|
OPA
|
Description
|
| D3
|
D2
|
D1
|
D0
|
D3
|
D2
|
D1
|
D0
|
| 00
|
NOP
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
No operation.
|
| 1x
|
JCN
|
0
|
0
|
0
|
1
|
c
|
Jump to address A if condition c is true, otherwise continue to the next instruction.
|
| A
|
| 2x
|
FIM
|
0
|
0
|
1
|
0
|
r
|
0
|
Fetch immediate from address A into register r.
|
| A
|
| 2x
|
SRC
|
0
|
0
|
1
|
0
|
r
|
1
|
Send register control. Send the address in register r to ROM and RAM at X2 and X3 time in the instruction cycle.
|
| 3x
|
FIN
|
0
|
0
|
1
|
1
|
r
|
0
|
Fetch indirect to register r.
|
| 3x
|
JIN
|
0
|
0
|
1
|
1
|
r
|
1
|
Jump indirect to address in register r.
|
| 4x
|
JUN
|
0
|
1
|
0
|
0
|
AA→
|
Jump unconditional to address AA.
|
| AA
|
| 5x
|
JMS
|
0
|
1
|
0
|
1
|
AA→
|
Jump to subroutine at address AA.
|
| AA
|
| 6x
|
INC
|
0
|
1
|
1
|
0
|
R
|
Increment register R.
|
| 7x
|
ISZ
|
0
|
1
|
1
|
1
|
R
|
Increment register R, then jump to address A if result  0, otherwise continue to the next instruction.
|
| A
|
| 8x
|
ADD
|
1
|
0
|
0
|
0
|
R
|
Add contents of register R to the accumulator with carry.
|
| 9x
|
SUB
|
1
|
0
|
0
|
1
|
R
|
Subtract the contents of register R from the accumulator with borrow.
|
| Ax
|
LD
|
1
|
0
|
1
|
0
|
R
|
Load contents of register R to the accumulator.
|
| Bx
|
XCH
|
1
|
0
|
1
|
1
|
R
|
Exchange contents of register R with the accumulator.
|
| Cx
|
BBL
|
1
|
1
|
0
|
0
|
d
|
Branch back (down 1 level in stack) and load data d into the accumulator.
|
| Dx
|
LDM
|
1
|
1
|
0
|
1
|
d
|
Load data d into the accumulator.
|
| E0
|
WRM
|
1
|
1
|
1
|
0
|
0
|
0
|
0
|
0
|
Write the contents of the accumulator into the previously selected RAM main memory character.
|
| E1
|
WRP
|
1
|
1
|
1
|
0
|
0
|
0
|
0
|
1
|
Write the contents of the accumulator to the previously selected RAM output port. (Output Lines)
|
| E2
|
WRR
|
1
|
1
|
1
|
0
|
0
|
0
|
1
|
0
|
Write the contents of the accumulator to the previously selected RAM output port. (I/O Lines)
|
| E3
|
WPM
|
1
|
1
|
1
|
0
|
0
|
0
|
1
|
1
|
Write the contents of the accumulator to the previously selected half-byte of read/write program memory.
|
| E4
|
WR0
|
1
|
1
|
1
|
0
|
0
|
1
|
0
|
0
|
Write the contents of the accumulator to the previously selected RAM status character 0.
|
| E5
|
WR1
|
1
|
1
|
1
|
0
|
0
|
1
|
0
|
1
|
Write the contents of the accumulator to the previously selected RAM status character 1.
|
| E6
|
WR2
|
1
|
1
|
1
|
0
|
0
|
1
|
1
|
0
|
Write the contents of the accumulator to the previously selected RAM status character 2.
|
| E7
|
WR3
|
1
|
1
|
1
|
0
|
0
|
1
|
1
|
1
|
Write the contents of the accumulator to the previously selected RAM status character 3.
|
| E8
|
SBM
|
1
|
1
|
1
|
0
|
1
|
0
|
0
|
0
|
Subtract the previously selected RAM main memory character from accumulator with borrow.
|
| E9
|
RDM
|
1
|
1
|
1
|
0
|
1
|
0
|
0
|
1
|
Read the previously selected RAM main memory character into the accumulator.
|
| EA
|
RDR
|
1
|
1
|
1
|
0
|
1
|
0
|
1
|
0
|
Read the contents of the previously selected ROM input port into the accumulator.
|
| EB
|
ADM
|
1
|
1
|
1
|
0
|
1
|
0
|
1
|
1
|
Add the previously selected RAM main memory character to the accumulator with carry.
|
| EC
|
RD0
|
1
|
1
|
1
|
0
|
1
|
1
|
0
|
0
|
Read the previously selected RAM status character 0 into the accumulator.
|
| ED
|
RD1
|
1
|
1
|
1
|
0
|
1
|
1
|
0
|
1
|
Read the previously selected RAM status character 1 into the accumulator.
|
| EE
|
RD2
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
0
|
Read the previously selected RAM status character 2 into the accumulator.
|
| EF
|
RD3
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
1
|
Read the previously selected RAM status character 3 into the accumulator.
|
| F0
|
CLB
|
1
|
1
|
1
|
1
|
0
|
0
|
0
|
0
|
Clear both accumulator and carry.
|
| F1
|
CLC
|
1
|
1
|
1
|
1
|
0
|
0
|
0
|
1
|
Clear carry.
|
| F2
|
IAC
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
0
|
Increment accumulator.
|
| F3
|
CMC
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
1
|
Complement carry.
|
| F4
|
CMA
|
1
|
1
|
1
|
1
|
0
|
1
|
0
|
0
|
Complement accumulator.
|
| F5
|
RAL
|
1
|
1
|
1
|
1
|
0
|
1
|
0
|
1
|
Rotate left (accumulator and carry).
|
| F6
|
RAR
|
1
|
1
|
1
|
1
|
0
|
1
|
1
|
0
|
Rotate right (accumulator and carry).
|
| F7
|
TCC
|
1
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
Transmit carry to accumulator and clear carry.
|
| F8
|
DAC
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
0
|
Decrement accumulator.
|
| F9
|
TCS
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
Transfer carry subtract and clear carry.
|
| FA
|
STC
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
0
|
Set carry.
|
| FB
|
DAA
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
1
|
Decimal adjust accumulator.
|
| FC
|
KBP
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
0
|
Process keyboard. Converts the contents of the accumulator from a one out of four code to a binary code.
|
| FD
|
DCL
|
1
|
1
|
1
|
1
|
1
|
1
|
0
|
1
|
Designate command line.
|
Instruction Details
| Notation
|
Description
|
| r
|
Identifies any of the index registers numbered 2 to 14.
|
| R
|
Identifies any of the index registers numbered 0 to 15.
|
| d
|
Identifies a single nibble (4-bits) unsigned integer (0 to 15).
|
| A
|
Identifies a single word (8-bits) memory address.
|
| AA
|
Identifies an extended word (12-bits) memory address.
|