NAND gate: Difference between revisions
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[[File:NAND ANSI.svg|thumb|165x165px|ANSI NAND gate symbol]] | |||
In [[digital electronics]], a '''NAND gate''' is a [[logic gate]] which produces an output of false when all its inputs are true; thus the outputs are the complement of the AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. | In [[digital electronics]], a '''NAND gate''' is a [[logic gate]] which produces an output of false when all its inputs are true; thus the outputs are the complement of the AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results. | ||
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The function NAND(''a''<sub>1</sub>, ''a''<sub>2</sub>, ..., ''a<sub>n</sub>'') is logically equivalent to NOT(''a''<sub>1</sub> AND ''a''<sub>2</sub> AND ... AND ''a<sub>n</sub>''). | The function NAND(''a''<sub>1</sub>, ''a''<sub>2</sub>, ..., ''a<sub>n</sub>'') is logically equivalent to NOT(''a''<sub>1</sub> AND ''a''<sub>2</sub> AND ... AND ''a<sub>n</sub>''). | ||
A two-input NAND gate can be expressed in Boolean logic as <math>\overline { A \cdot B } = \overline A + \overline B</math>. | A two-input NAND gate can be expressed in [[Boolean logic]] as <math>\overline { A \cdot B } = \overline A + \overline B</math>. | ||
Another way of expressing A NAND B is <math>\overline { A \land B }</math>, where the symbol <math>\land</math> signifies AND and the bar signifies the negation of the expression under it: in essence, simply <math>\neg(A \land B)</math>. | Another way of expressing A NAND B is <math>\overline { A \land B }</math>, where the symbol <math>\land</math> signifies AND and the bar signifies the negation of the expression under it: in essence, simply <math>\neg(A \land B)</math>. | ||
== Functional completeness == | == Functional completeness == | ||
{{main|NAND logic|NOR logic}} | {{main|NAND logic|NOR logic}} | ||
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As NOR gates are also functionally complete, if no specific NAND gates are available, one can be made from NOR gates using NOR logic. | As NOR gates are also functionally complete, if no specific NAND gates are available, one can be made from NOR gates using NOR logic. | ||
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| [[File:NAND_from_NOR_ANSI.svg|313x313px]] | |||
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== See also == | == See also == |
Latest revision as of 23:33, 8 November 2023
NAND gate truth table | ||
---|---|---|
Input | Output | |
A | B | A NAND B |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |

In digital electronics, a NAND gate is a logic gate which produces an output of false when all its inputs are true; thus the outputs are the complement of the AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output results.
The NAND gate is significant because any Boolean function can be implemented by using a combination of NAND gates. This property is called "functional completeness". It shares this property with the NOR gate. Digital systems employing certain logic circuits take advantage of NAND's functional completeness.
Logic
The function NAND(a1, a2, ..., an) is logically equivalent to NOT(a1 AND a2 AND ... AND an).
A two-input NAND gate can be expressed in Boolean logic as .
Another way of expressing A NAND B is , where the symbol signifies AND and the bar signifies the negation of the expression under it: in essence, simply .
Functional completeness
The NAND gate has the property of functional completeness, which it shares with the NOR gate. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates.
As NOR gates are also functionally complete, if no specific NAND gates are available, one can be made from NOR gates using NOR logic.
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